Clash Language

We're happy to announce the first release of `clash-shockwaves`! Thanks to the flexibility of https://surfer-project.org you can now see your Clash data types directly in your traces - and with colours!! 🌈

https://clash-lang.org/blog/2026-04-21-shockwaves/

#Haskell #FPGA

It's been a long time coming, but it's finally time for a new Clash release! In 1.10 you can find new exciting things like `NumConvert`, support for GHC 9.12 and many other quality changes! 🥳

https://clash-lang.org/blog/2026-04-28-clash110/

#Haskell #FPGA

What happens when Clash meets Rust? Interesting things that bring us to the edge of what the languages can handle! See how we approached representing Clash’s numeric types in Rust in this new blog post.

https://clash-lang.org/blog/0008-clash-num/
#rustlang #rust #haskell #fpga

Those warnings about uses of `Integer` even if you don't use any in your code? Yeah, we're working on those! 😎

Already in 1.10 and ready to use, `NumConvert` is here to help with that!

https://clash-lang.org/blog/2026-05-19-numconvert/

#Haskell #FPGA

We are looking for your feedback! 👀
Have you tried to learn Clash in the past? Are you using Clash right now? Anything that didn't quite click or was unwieldy to use? Something you think we should improve? 🥼

Here's the link to the forum post, but you can reach out to us on your platform of choice of course :)

https://clash-lang.discourse.group/t/we-d-love-your-feedback-on-using-clash/103

#FPGA #Clash #Haskell

The Clash Compiler User Guide has gotten a new look and a new home! 🤩

It's still actively being worked on and being updated, but you can find it here: https://docs.clash-lang.org/compiler-user-guide/

Time for my #introduction to the Fediverse! :masto_love:

Clash is an open source functional hardware description language built on #Haskell.
The Clash compiler allows you to use Haskell features like its strong and powerful typesystem as well as use existing Haskell code and libraries in your #FPGA and #ASIC designs! You can test your designs right inside the REPL, simulate it alongside other Haskell code or output #VHDL / #Verilog / #SystemVerilog code for synthesis.

Links in the profile ✨

We now have a forum for Clash! Ask and search through questions, share your projects and connect with fellow community members! ✨

https://clash-lang.discourse.group/

See you there! 🫡

Curious how #Clash models signals for #FPGA and #ASIC in #Haskell? This short post/tutorial explains this, with an interactive diagram for visualizing clock domain crossing 🤯

https://clash-lang.org/blog/0007-signals/

The Clash compiler is built on top of GHC - ever wondered what it takes to update to a new GHC version? Here's a blog post talking about the upgrade process a bit! ✨

https://qbaylogic.com/blog/upgrading-the-clash-compiler-to-a-new-version-of-ghc/

#haskell

Ever got caught with a numeric literal that was too big for a Clash (or otherwise Haskell) Type and didn’t get a warning or an error?

Yeah, us too! So we introduce a new package: `checked-literals` Read more about it in the new post:

https://clash-lang.org/blog/0009-checked-literals/

#haskell #fpga