New LUTI2/LUTI4 SIMD instructions on the Apple M6 are fast! 4 per cycle throughput, 2 cycle latency (on the S-cores), matching TBL (on all cores). Nice for pivco-huffman (and presumably some other SIMD compression schemes). There also seems to be some SIMD/FP FMIN/FMAX fusion (for clamps and reductions), but tragically not for SIMD integer min/max. Other neat new fusions: SIMD CMGT/CMEQ + AND/ORR and scalar shift (unsigned or by imm) + AND #imm. https://docsmirror.github.io/A64/2025-06/luti2_advsimd.html https://docsmirror.github.io/A64/2025-06/luti4_advsimd.html